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    <title>Research @ Infosys Labs</title>
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    <id>tag:www.infosysblogs.com,2010-03-19:/infosys-labs/31</id>
    <updated>2012-05-15T05:00:45Z</updated>
    <subtitle>The Infosys Labs research blog tracks trends in technology with a focus on applied research in Information and Communication Technology (ICT)</subtitle>
    <generator uri="http://www.sixapart.com/movabletype/">Movable Type 4.34-en</generator>

<entry>
    <title>Monte Carlo Integration On the GPU - VEGAS Algorithm</title>
    <link rel="alternate" type="text/html" href="http://www.infosysblogs.com/infosys-labs/2012/05/monte_carlo_integration_on_the.html" />
    <id>tag:www.infosysblogs.com,2012:/infosys-labs//31.6180</id>

    <published>2012-05-15T04:19:59Z</published>
    <updated>2012-05-15T05:00:45Z</updated>

    <summary>The subject of this blog is the first of the two research talks that I would be presenting at the GPU Technology Conference in San Jose this week. The talk is titled &quot;Fast Adaptive Sampling Technique For Multi-Dimenstional Integral Estimation...</summary>
    <author>
        <name>Chandrasekhar Prabala</name>
        
    </author>
    
        <category term="High Performance Computing" scheme="http://www.sixapart.com/ns/types#category" />
    
    <category term="algorithms" label="algorithms" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="hpc" label="HPC" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="hpcsimulationgpumulticoremanycore" label="HPC Simulation GPU Multicore Many-core" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="montecarlointegration" label="MonteCarlo Integration" scheme="http://www.sixapart.com/ns/types#tag" />
    
    <content type="html" xml:lang="en" xml:base="http://www.infosysblogs.com/infosys-labs/">
        <![CDATA[<p><a name="_GoBack"></a><span style="FONT-FAMILY: 'Arial', 'sans-serif'; COLOR: #333333; FONT-SIZE: 10pt">The subject of this blog is the first of the two research talks that I would be presenting at the GPU Technology Conference in San Jose this week. The talk is titled "Fast Adaptive Sampling Technique For Multi-Dimenstional Integral Estimation Using GPUs". <o:p></o:p></span></p>
<p><span id="internal-source-marker_0.3501059837800852"><span style="FONT-FAMILY: 'Arial', 'sans-serif'; COLOR: #333333; FONT-SIZE: 10pt">Few numerical methods bring as much delight as Monte-Carlo integrations do to a HPC programmer. Even more so, when the platform is a GPU. Their relative ease of implementation coupled with the inherent parallel nature of these numerical methods and the knack with which they find solutions to some problems that are considered tough nuts to crack, place these methods at the top of a statistical programmer's toolbox. Be it pricing complex derivative products in Finance or be it in areas of modern physics such as Quantum Chromodynamics, often Monte-Carlo methods are the only ways by which a reasonable answer to the problem can be found out. However, there is no free lunch. Attractive Monte-Carlo integration is but its not hunky dory all the time. The same law of large numbers that underlies Monte-Carlo method's success is also sometimes the reason why these methods become computationally demanding and hence impractical. Frequently there arise scenarios in which the simulation just does not converge fast enough. Rephrased the number of samples required for the simulations to converge might just be prohibitive large for practical purposes. It is here that Variance Reduction techniques come to the rescue. Variance reduction techniques exploit the structure of the problem at hand and impart direction to what is otherwise a numerical method which is absolutely random and blindly so. VEGAS is one such variance reduction technique. It can be thought of as a hybrid of both Importance Sampling and Stratified Sampling. It's an adaptive technique in the sense that the algorithm iteratively identifies the right distribution of the function at hand and works towards generating random samples that closely mirror the distribution. VEGAS greatly improves the accuracy and speed with which Monte-Carlo integrations can&nbsp;be solved.</span></span></p>
<p><span><span style="FONT-FAMILY: 'Arial', 'sans-serif'; COLOR: #333333; FONT-SIZE: 10pt">As an example consider the following diagram. The graph of the function that needs to be integrated is shown.&nbsp;</span></span></p>
<p><span><span style="FONT-FAMILY: 'Arial', 'sans-serif'; COLOR: #333333; FONT-SIZE: 10pt"></span></span>&nbsp;</p>
<p><span><span style="FONT-FAMILY: 'Arial', 'sans-serif'; COLOR: #333333; FONT-SIZE: 10pt"><img style="TEXT-ALIGN: center; MARGIN: 0px auto 20px; DISPLAY: block" class="mt-image-center" alt="MCIntegration1.png" src="http://www.infosysblogs.com/infosys-labs/images/MCIntegration1.png" width="637" height="250" />The algorithm proceeds in the following fashion.</span></span></p>
<p><span><span style="FONT-FAMILY: 'Arial', 'sans-serif'; COLOR: #333333; FONT-SIZE: 10pt">1) The area in the limits of the integration is subdivided into equal sized blocks called bins. Such a set of blocks can be set up using a grid as shown in the figure above. </span></span></p>
<p><span><span style="FONT-FAMILY: 'Arial', 'sans-serif'; COLOR: #333333; FONT-SIZE: 10pt">2) a large number of random samples are generated such that there are equal number of samples in each bin.</span></span></p>
<p><span><span style="FONT-FAMILY: 'Arial', 'sans-serif'; COLOR: #333333; FONT-SIZE: 10pt">3) The integral is now evaluated for each bin of samples. Bins are now weighted by the contribution they make to the integral's value. </span></span></p>
<p><span><span style="FONT-FAMILY: 'Arial', 'sans-serif'; COLOR: #333333; FONT-SIZE: 10pt">4) Using the weights obtained&nbsp;in the previous step the grid is now resized to reflect those weights. The grid resize ensures that there are more number of bins in the area that forms the meat of the function. </span></span></p>
<p><span><span style="FONT-FAMILY: 'Arial', 'sans-serif'; COLOR: #333333; FONT-SIZE: 10pt">5) We go back to step 3.</span></span></p>
<p><span><span style="FONT-FAMILY: 'Arial', 'sans-serif'; COLOR: #333333; FONT-SIZE: 10pt">6) Steps 3,4 and 5 are repeated until the necessary confidence interval is achieved. </span></span></p>
<p><span><span style="FONT-FAMILY: 'Arial', 'sans-serif'; COLOR: #333333; FONT-SIZE: 10pt">Grid resizing is shown in the picture below.</span></span></p>
<p><span><span style="FONT-FAMILY: 'Arial', 'sans-serif'; COLOR: #333333; FONT-SIZE: 10pt"></span></span>&nbsp;</p>
<p><span><span style="FONT-FAMILY: 'Arial', 'sans-serif'; COLOR: #333333; FONT-SIZE: 10pt"></span></span><img style="TEXT-ALIGN: center; MARGIN: 0px auto 20px; DISPLAY: block" class="mt-image-center" alt="MCIntegration3.png" src="http://www.infosysblogs.com/infosys-labs/images/MCIntegration3.png" width="570" height="288" /></p>
<p>The most straighforward of strategies for running this algorithm in parallel is to evaluate the integral at each of these points in parallel.&nbsp;The unbiased estimator that gives us the value of the integral can also be carried out in parallel using parallel reduction sum. </p>
<p>The iterative nature of the algorithm means that the task&nbsp;has to be carried out quite a number of times in succession until desired convergence criteria is met. </p>
<p>Since the GPU implementation and the optimizations are the primary subject of my talk on Wednesday, I will hold back on writing on those until that time. I will then re-edit this post and put in the details of the strategies we took to take advantage of the full power of the GPUs, the challenges we faced on the way and how we have overcome those. </p>
<p>&nbsp;</p>]]>
        
    </content>
</entry>

<entry>
    <title>Infosys @ Nvidia GPU Technology Conference 2012</title>
    <link rel="alternate" type="text/html" href="http://www.infosysblogs.com/infosys-labs/2012/05/infosys_nvidia_gpu_technology.html" />
    <id>tag:www.infosysblogs.com,2012:/infosys-labs//31.6173</id>

    <published>2012-05-14T04:38:03Z</published>
    <updated>2012-05-14T05:49:27Z</updated>

    <summary><![CDATA[Hi There,&nbsp;I am super excited to tell you that I will be presenting some of the work that the High Performance Computing team @ Infosys has been doing using GPUs at the annual Nvidia GPU Technology Conference at the McEnery...]]></summary>
    <author>
        <name>Chandrasekhar Prabala</name>
        
    </author>
    
        <category term="Distributed Computing" scheme="http://www.sixapart.com/ns/types#category" />
    
        <category term="High Performance Computing" scheme="http://www.sixapart.com/ns/types#category" />
    
    <category term="gpu" label="GPU" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="gpucomputing" label="GPU Computing" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="gtc" label="GTC" scheme="http://www.sixapart.com/ns/types#tag" />
    
    <content type="html" xml:lang="en" xml:base="http://www.infosysblogs.com/infosys-labs/">
        <![CDATA[Hi There,&nbsp;<div><br /></div><div>I am super excited to tell you that I will be presenting some of the work that the High Performance Computing team @ Infosys has been doing using GPUs at the annual Nvidia GPU Technology Conference at the McEnery Convention Center in &nbsp;San Jose, CA. While the conference itself kicks of in a few hours from now, the Infosys talks are scheduled on 16th, i.e. Wednesday.</div><div><br /></div><div>The first talk is titled "Fast Adaptive Sampling Technique For Multi-Dimensional Integral Estimation Using GPUs". This is happening in Marriot Ball Room 3 at 2:30 PM.</div><div><br /></div><div>The second talk is titled "GPU Based Stacking Sequence Optimization For Composite Skins Using GA". This talk is happening in Room K at 3 PM.</div><div><br /></div><div>The subject of the first talk is an algorithm called VEGAS. VEGAS is a variance reduction technique that hastens convergence of a Monte-Carlo integration. This algorithm has wide applications from Computational Finance to High Energy Physics.</div><div><br /></div><div>The subject of the second talk is a genetic algorithm that's at the heart of aircraft wing manufacturing. Modern aircraft wings are manufactured using composite materials. Sheets of these materials have to be overlaid on top of one another such that ability of the wing to sustain high stress in flight is maximized while at the same time minimizing violations of constraints that dictate what's an admissible ordering of the materials.&nbsp;</div><div><br /></div><div>I will elaborate on these short summaries of these two talks in subsequent blog posts over the next couple of days.</div><div><br /></div><div>If you are going to be at GTC, kindly make it&nbsp;convenient to attend these talks. I will glad to meet you and tell you all the good work that we have been doing in the area of GPU computing in our labs and I would be equally excited to know about some of the coolest ways in which you are using GPUs too or else leave us a comment here on the blog. I will get back to you and we can engage in some geekery.&nbsp;</div><div><br /></div><div>Cheers...</div>]]>
        
    </content>
</entry>

<entry>
    <title>Uncomplicating HPC using technology aids</title>
    <link rel="alternate" type="text/html" href="http://www.infosysblogs.com/infosys-labs/2012/04/uncomplicating_hpc_using_techn.html" />
    <id>tag:www.infosysblogs.com,2012:/infosys-labs//31.6075</id>

    <published>2012-04-25T10:00:00Z</published>
    <updated>2012-04-24T04:07:33Z</updated>

    <summary>There is no question that HPC is not easy to achieve. Microsoft with its Windows HPC Server 2008, comes to the rescue.</summary>
    <author>
        <name>Sripriya Thothadri</name>
        
    </author>
    
        <category term="High Performance Computing" scheme="http://www.sixapart.com/ns/types#category" />
    
    <category term="hpc" label="HPC" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="hpcclustermanagement" label="HPC cluster management" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="hpctechnology" label="HPC technology" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="windowshpcserver" label="Windows HPC Server" scheme="http://www.sixapart.com/ns/types#tag" />
    
    <content type="html" xml:lang="en" xml:base="http://www.infosysblogs.com/infosys-labs/">
        <![CDATA[<p>Ok, so we understand that HPC is noteworthy. But if we said parallel computing is complex then achieving HPC is definetely no easy game. The industry offering to simplify HPC is growing and HPC cluster management software is an interesting technology that is doing its bit to ease HPC adoption. To put simply, HPC comes into play when there is typically a cluster of parallel hardware that needs to be used efficiently. And cluster management becomes crucial in order to effectively use and administer the cluster. </p>
<p><br />Amongst the&nbsp;key players in the HPC cluster management space is Microsoft with its Window HPC Server 2008. This incredibly user-friendly and powerful solution from Microsoft, comprises of a Job Scheduler, MPI support and cluster administration including monitoring facilities for a multicore environment. Built on Windows Server 2008 64-bit OS, HPC Server can efficiently scale to thousands of processing cores, efficiently scheduling jobs on the cluster and providing user-friendly console to monitor and manage this cluster. As a scheduler, it can efficiently schedule jobs by balancing the load based on one of these resources in the HPC cluster:<br />1)&nbsp;Node wise<br />2)&nbsp;Port wise<br />3)&nbsp;Core wise</p>
<p><br />HPC Server comes as a free add-on to Windows Server 2008 R2 and&nbsp;is very handy to easily bring in HPC for an embarrassingly parallel application that is aiming to leverage the full power of the underlying cluster. But wait, let me clarify. Sequential applications whose operations are embarrassingly parallel can be HPC-enabled by employing HPC Server. When there is an inherent parallelism in a sequential application, it is possible for it to effectively run on a HPC cluster with the help of HPC Server, without having to rewrite it to make it parallel. That's a treat, I must say. I hope you find this as awesome as I do.</p>]]>
        
    </content>
</entry>

<entry>
    <title>Is Parallel Computing HPC?</title>
    <link rel="alternate" type="text/html" href="http://www.infosysblogs.com/infosys-labs/2012/04/is_parallel_computing_hpc.html" />
    <id>tag:www.infosysblogs.com,2012:/infosys-labs//31.6072</id>

    <published>2012-04-23T20:13:12Z</published>
    <updated>2012-04-24T04:06:56Z</updated>

    <summary>HPC and parallel computing are often substitute one for the other. But is this really correct? What is HPC and why is it being talked about?</summary>
    <author>
        <name>Sripriya Thothadri</name>
        
    </author>
    
        <category term="High Performance Computing" scheme="http://www.sixapart.com/ns/types#category" />
    
    <category term="hpc" label="HPC" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="parallelcomputing" label="Parallel Computing" scheme="http://www.sixapart.com/ns/types#tag" />
    
    <content type="html" xml:lang="en" xml:base="http://www.infosysblogs.com/infosys-labs/">
        <![CDATA[<p>Often times I use parallel computing and High Performance Computing rather loosely, interchanging the two and substituting one for the other. But for the purpose of clearly understanding both of these, it can be stated that if HPC were the end goal then parallel computing is the means. Parallel computing is independent of HPC meaning that the end goal of parallel computing need not be HPC. Parallel computing using supercomputers is typically what is called HPC. But with massively parallel hardware such as the GPUs available commonly, this definition seems to have been diluted a little and colloquially speaking parallel computing and HPC are not distinguished. </p>
<p><br />HPC is a growing and niche technology area and it is interesting to note that the U.S. government considers this an important technology that will help U.S. businesses, primarily manufacturing, to compete effectively by accelerating innovation. It is interesting to note that Ron Bloom, special assistant for manufacturing to the U.S. President, Mr. Obama, participated in a meeting, organized by the Council on Competitiveness Technology Leadership and Strategy Initiative advisory committee on HPC, to discuss how HPC can help U.S. manufactures to innovate and compete more effectively in the global market. It is with the same enthusiasm that other nations are looking to use HPC for innovation. <br />HPC needs are definitely growing and here are some of the key drivers for HPC:<br />•&nbsp;<strong>Reduce computation time</strong> - There are applications that are so complex that it takes a day to a week to get answers. With changing business dynamics, these applications, which enable key business decisions, would need to be tuned to produce their results in much lesser time for faster decision making. Despite the optimizations it wouldn't be possible to get higher application performance simply because these applications are sequential.<br />•&nbsp;<strong>Real time computations</strong> - It is becoming crucial for several core business applications to deliver real time or near real time results. This is simply not possible given the sequential nature of these applications.<br />•&nbsp;<strong>High throughput</strong> - Sometimes the need is to be able to get applications do much more within the same time window. Again, unless the application is adapted to parallel hardware it will simply not be possible&nbsp;to deliver high throughput.</p>
<p><br />HPC is slowly moving mainstream and is seeing adoption in the analytics and business intelligence space and planning and forecasting. As businesses target real time and near real time applications, HPC will become imperative. <br /></p>]]>
        
    </content>
</entry>

<entry>
    <title>Google SERP&apos;s new &apos;semantic&apos; feature</title>
    <link rel="alternate" type="text/html" href="http://www.infosysblogs.com/infosys-labs/2012/04/google_serps_new_semantic_feat.html" />
    <id>tag:www.infosysblogs.com,2012:/infosys-labs//31.6007</id>

    <published>2012-04-03T08:00:32Z</published>
    <updated>2012-04-03T08:22:06Z</updated>

    <summary>Google has introduced a new feature called &apos;Best Guess&apos; on its SERP. This blog talks about this feature.</summary>
    <author>
        <name>Shelly Singh</name>
        
    </author>
    
        <category term="Semantic Technology" scheme="http://www.sixapart.com/ns/types#category" />
    
    
    <content type="html" xml:lang="en" xml:base="http://www.infosysblogs.com/infosys-labs/">
        <![CDATA[<p><font style="FONT-SIZE: 1.25em"><strong>Google </strong></font>quietly introduced an exciting feature recently on its SERP (Search Engine Result Pages). The feature is the <font style="FONT-SIZE: 1.25em"><strong>'Best Guess' </strong></font>feature. And wonderful it is because it quite appears like Question-answering on common knowledge and general relations.<br />Google can now tell you names of spouse (of celebrities of course), names of children, ceo's of company, birthday of someone; capital of a country.. and these are not wrapped in documents but picked out and put there as Best Guess on top of the SERP. This is very smart.</p>
<p>Example--<br />query - Director of Titanic<br /><strong>Best guess </strong>for <strong>Titanic Director </strong>is <strong><font style="FONT-SIZE: 1.25em">James Cameron<br /></font></strong>Mentioned on at least <strong>8 websites </strong>including <u>wikipedia.org, imdb.com </u>and <u>answers.</u>com - Show sourcesHide sources - Feedback</p>
<p>children of barack obama<br /><strong>Best guess </strong>for <strong>Barack Obama Children </strong>is <strong><font style="FONT-SIZE: 1.25em">Natasha Obama, Malia Ann Obama<br /></font></strong>Mentioned on <u>about.com </u>- Show sourcesHide sources - Feedback</p>
<p>And it also tells you, where it picked up these guesses from... in the form of 'Mentioned on xx websites including a.com,b.com etc etc'...</p>
<p>This feature is looking quite exciting. It will certainly change the way people search the web and what they expect from the web search engines.</p>
<p>This feature has been around for about an year(and maybe more) but has not garnered a lot of heat yet; may be because the guesses google makes(so far), are really common knowledge and probably does not help an information seeker a lot. Or maybe because information seeker knows the website that gives him guaranteed infortion and does not follow the search engine route to get there. As of now, for me, its more of a play than a smart 'answering' mechanism. But, I am hopeful that this feature will be enriched and more elolved in future.</p>
<p>I put my little thought into how google must be doing this. I thought its doing extraction from socially trusted sources(like Wikipedia) and building a database of important relations. But this is a thought.</p>
<p>Comments welcome!</p>]]>
        
    </content>
</entry>

<entry>
    <title>Interface testing</title>
    <link rel="alternate" type="text/html" href="http://www.infosysblogs.com/infosys-labs/2012/03/interface_testing.html" />
    <id>tag:www.infosysblogs.com,2012:/infosys-labs//31.5891</id>

    <published>2012-03-14T12:45:35Z</published>
    <updated>2012-03-14T12:53:31Z</updated>

    <summary>An enterprise application may comprise of software components and these components needs to interact with each other constantly.This is where an interface comes into picture, to facilitate the working of various modules as a single application.Performance testing is conducted to...</summary>
    <author>
        <name>Rini Susan V. S.</name>
        
    </author>
    
        <category term="Software Engineering" scheme="http://www.sixapart.com/ns/types#category" />
    
    
    <content type="html" xml:lang="en" xml:base="http://www.infosysblogs.com/infosys-labs/">
        <![CDATA[<p class="MsoNormal" style="MARGIN: 0in 0in 0pt; TEXT-INDENT: 0.5in"><font size="3"><font color="#000000"><font face="Calibri">An enterprise application may comprise of software components and these components needs to interact with each other constantly.</font></font></font><font size="3"><font color="#000000"><font face="Calibri">This is where an interface comes into picture, to facilitate the working of various modules as a single application.</font></font></font><font size="3"><font color="#000000"><font face="Calibri">Performance testing is conducted to verify whether a system meets the performance criteria under varying workload.<o:p></o:p></font></font></font></p>
<p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><font size="3"><font color="#000000"><font face="Calibri"><span style="mso-tab-count: 1">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span>Based on the project experience, an overview of interface performance testing is mentioned below.</font></font></font><font size="3"><font color="#000000"><font face="Calibri">The interface which was tested interacted with the Order Management System and the Employee Management System.</font></font></font><font size="3"><font color="#000000"><font face="Calibri">Order details and updated order status of customer were transferred between the two systems. <o:p></o:p></font></font></font></p>
<p class="MsoNormal" style="MARGIN: 0in 0in 0pt; TEXT-INDENT: 0.5in"><font size="3"><font color="#000000"><font face="Calibri">The messages being sent between the systems were in xml file format.TIBCO queues were tested during this exercise.</font></font></font><font size="3"><font color="#000000"><font face="Calibri">Messages from Order Management System were pushed to TIBCO queue and the queue consumed these messages.</font></font></font><font size="3"><font color="#000000"><font face="Calibri">This process triggered an adapter service which in turn invoked web services call to update the Employee Management System. <o:p></o:p></font></font></font></p>
<p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><font size="3"><font color="#000000"><font face="Calibri"><span style="mso-tab-count: 1">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span>During load test, large volume of messages would be pushed to queue and the number of messages consumed and time taken for this would be monitored.</font></font></font><font size="3"><font color="#000000"><font face="Calibri">We faced some issues during our interface testing, hence following points need to be taken care of:<o:p></o:p></font></font></font></p>
<p class="MsoListParagraph" style="MARGIN: 0in 0in 0pt 0.5in; TEXT-INDENT: -0.25in; mso-list: l0 level1 lfo1"><font color="#000000"><span style="mso-ascii-font-family: Calibri; mso-fareast-font-family: Calibri; mso-hansi-font-family: Calibri; mso-bidi-font-family: Calibri"><span style="mso-list: Ignore"><font face="Calibri" size="3">-</font><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span></span><font size="3"><font face="Calibri">Ensure queue receivers are up before test<o:p></o:p></font></font></font></p>
<p class="MsoListParagraph" style="MARGIN: 0in 0in 0pt 0.5in; TEXT-INDENT: -0.25in; mso-list: l0 level1 lfo1"><font color="#000000"><span style="mso-ascii-font-family: Calibri; mso-fareast-font-family: Calibri; mso-hansi-font-family: Calibri; mso-bidi-font-family: Calibri"><span style="mso-list: Ignore"><font face="Calibri" size="3">-</font><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span></span><font size="3"><font face="Calibri">Each XML Message should be in a single line.<o:p></o:p></font></font></font></p>
<p class="MsoListParagraph" style="MARGIN: 0in 0in 0pt 0.5in; TEXT-INDENT: -0.25in; mso-list: l0 level1 lfo1"><font color="#000000"><span style="mso-ascii-font-family: Calibri; mso-fareast-font-family: Calibri; mso-hansi-font-family: Calibri; mso-bidi-font-family: Calibri"><span style="mso-list: Ignore"><font face="Calibri" size="3">-</font><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span></span><font size="3"><font face="Calibri">Ensure latest deployments are done across the systems involved.<o:p></o:p></font></font></font></p>]]>
        
    </content>
</entry>

<entry>
    <title>Engineering High Performance Applications</title>
    <link rel="alternate" type="text/html" href="http://www.infosysblogs.com/infosys-labs/2012/03/engineering_high_performance_a.html" />
    <id>tag:www.infosysblogs.com,2012:/infosys-labs//31.5867</id>

    <published>2012-03-09T13:04:25Z</published>
    <updated>2012-03-09T13:14:21Z</updated>

    <summary>Is it good enough to just compose kernels to build an application that needs HPC? Infosys&apos; HPC research claims otherwise. Read on..</summary>
    <author>
        <name>Sripriya Thothadri</name>
        
    </author>
    
        <category term="High Performance Computing" scheme="http://www.sixapart.com/ns/types#category" />
    
    <category term="hpc" label="HPC" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="hpcapplications" label="HPC applications" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="kernelcomposition" label="Kernel composition" scheme="http://www.sixapart.com/ns/types#tag" />
    
    <content type="html" xml:lang="en" xml:base="http://www.infosysblogs.com/infosys-labs/">
        <![CDATA[<p>Here it is a peek into the work that the Infosys HPC Research team is working excitedly on.&nbsp; They are studying <em><strong>efficient kernel composition </strong></em>techniques with an aim to deliver optimized application performance. To state simply, kernels are GPU programs. The HPC industry today is busy discovering ways to write optimized kernels but taking this to the next level would be to think how best I can build an application that is made of several well-optimized kernels. Can I simply bundle these highly optimized kernels to create a high performance application? </p>
<p><br />Component based design is well-researched and mature area and is aimed at reusability. Such a reusability concept can also be used to build applications in the HPC world. Using composition it is possible to build an application that is composed of kernels. These kernels perform a specific task and are highly optimized, making efficient use of the GPU. And since everyone knows that GPUs are used primarily for high performance, it becomes imperative that such a composition optimizes not just reusability but also optimizes performance. <br />Kernel developers characterize the performance of their kernels through its performance signature. The application designer combines these kernels with the objective that the performance of the refactored kernel is better than the sum of the performances of the individual kernels.&nbsp; But there is more to this than just putting these kernels together.&nbsp; What make this interesting and also difficult is that different kernels may make unbalanced use of different GPU resources like different types of memory. Kernels may also have the potential to share data. Refactoring the kernels, combining them and scheduling them suitably, improves performance. The research team has studied different types of potential design optimizations and has evaluated their effectiveness on different types of kernels. </p>
<p>The team shares that by applying their kernel composition techniques; they have observed that the composed application performance increases considerably as compared to just naively tying the kernels together.&nbsp; </p>
<p><br />Now, I think this is going to be very useful soon, when the focus shifts from developing isolated GPU programs to building applications that consume these individual high performing computation units. Going by the evolution of software engineering that began with writing small programs to the present day SOA, I am quite sure that HPC and parallel computing will gain enough momentum to propel software engineering methodologies for HPC. What say?</p>]]>
        
    </content>
</entry>

<entry>
    <title>OpenCL Compiler from PGI for multicore ARM processors</title>
    <link rel="alternate" type="text/html" href="http://www.infosysblogs.com/infosys-labs/2012/02/opencl_compiler_from_pgi_for_m.html" />
    <id>tag:www.infosysblogs.com,2012:/infosys-labs//31.5819</id>

    <published>2012-02-29T04:59:15Z</published>
    <updated>2012-02-29T05:26:28Z</updated>

    <summary>Here is some great news for those looking for accelerating applications on the Android platform using OpenCL. Portland Group (PGI), has announced OpenCL framework for multicore ARM based processors. What this means is, we now have an OpenCL compiler for ARM based CPUs as a compute device in addition to existing ones for x86 CPUs and GPUs. With this announcement, PGI OpenCL becomes the first OpenCL compiler for Android targeting multicore ARM processors.</summary>
    <author>
        <name>Pradeep Rao</name>
        
    </author>
    
        <category term="High Performance Computing" scheme="http://www.sixapart.com/ns/types#category" />
    
        <category term="Mobility" scheme="http://www.sixapart.com/ns/types#category" />
    
    <category term="android" label="Android" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="arm" label="ARM" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="multicore" label="multicore" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="opencl" label="OpenCL" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="pgi" label="PGI" scheme="http://www.sixapart.com/ns/types#tag" />
    
    <content type="html" xml:lang="en" xml:base="http://www.infosysblogs.com/infosys-labs/">
        <![CDATA[<p>Here is some great news for those looking for accelerating applications on the Android platform using OpenCL. Portland Group (PGI), has announced OpenCL framework for multicore ARM based processors. What this means is, we now have an OpenCL compiler for ARM based CPUs as a compute device in addition to existing ones for x86 CPUs and GPUs. With this announcement, PGI OpenCL becomes the first OpenCL compiler for Android targeting multicore ARM processors.</p>
<p>OpenCL being an open standard programming model for heterogonous processor systems, developers can now build portable multicore applications that can run across various mobile platforms using PGI's new framework. The initial release supports OpenCL 1.1 Embedded profile specification and is currently targeted at ST Ericsson Novathor ARM based processors.&nbsp; </p>
<p>As specified by PGI, following core components comprise the PGI OpenCL framework:<br />1. PGI OpenCL device compiler--compiles OpenCL kernels for parallel execution on multi-core ARM processors<br />2. PGCL driver--a command-level driver for processing source files containing C99, C++ or OpenCL program units, including support for static compilation of OpenCL kernels<br />3. OpenCL host compilers--the PGCL driver uses the Android native development kit versions of gcc and g++ to compile OpenCL host code<br />4. OpenCL Platform Layer--a library of routines to query platform capabilities and create execution contexts from OpenCL host code<br />5. OpenCL Runtime Layer--a library of routines and an extensible runtime system used to set up and execute OpenCL kernels on multi-core ARM</p>
<p>More details on the framework on the PGI site <a href="www.pgroup.com/products/pgcl.htm">here</a>.</p>]]>
        
    </content>
</entry>

<entry>
    <title>Is Parallel Computing a Rocket Science or Esoteric? Part 3</title>
    <link rel="alternate" type="text/html" href="http://www.infosysblogs.com/infosys-labs/2012/02/is_parallel_computing_a_rocket_part_3.html" />
    <id>tag:www.infosysblogs.com,2012:/infosys-labs//31.5815</id>

    <published>2012-02-28T06:42:23Z</published>
    <updated>2012-02-28T07:07:24Z</updated>

    <summary>Having said a lot about the hardware evolution and intricacies in my previous posts(Part1 &amp; Part2) that have influenced Parallel Computing, the question now to ask would be - Is Parallel Computing really a Rocket Science? Is Parallel Computing esoteric?</summary>
    <author>
        <name>Sridutt Bhalachandra</name>
        
    </author>
    
        <category term="High Performance Computing" scheme="http://www.sixapart.com/ns/types#category" />
    
    <category term="hpc" label="HPC" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="parallelcomputing" label="Parallel Computing" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="parallelism" label="Parallelism" scheme="http://www.sixapart.com/ns/types#tag" />
    
    <content type="html" xml:lang="en" xml:base="http://www.infosysblogs.com/infosys-labs/">
        <![CDATA[<p>Having said a lot about the hardware evolution and intricacies in my previous posts(<a href="http://www.infosysblogs.com/infosys-labs/2012/02/is_parallel_computing_a_rocket_science_or_esoteric_part_1.html">Part1</a> &amp; <a href="http://www.infosysblogs.com/infosys-labs/2012/02/is_parallel_computing_a_rocket.html">Part2</a>) that have influenced Parallel Computing, the question now to ask would be -<em> Is Parallel Computing really&nbsp;a Rocket Science?</em> Is Parallel Computing esoteric? The answer may be both yes and no. <em>Bill Gates' Keynote in Supercomputing 05 Conference was titled "The Future of Computing in the Sciences"</em>; the title seems apt, as Parallel Computing evolved mainly owing to the computational requirements for solving complex and advance computation problems in sciences that entailed high performance. This involved use of huge clusters and supercomputers. This class of computing is thus rightly named <em>High Performance Computing (HPC)</em>. Understandably, these class of applications happened to be aimed at solving the toughest and convoluted problems of diverse sciences like astronomy, biology, mathematics and so on. Thus, owing to the complex nature and specialization entailment of these subjects, HPC seems to be esoteric here.</p>
<p>But due to the hardware technology advancement today; we have servers approaching teraflops speed thus the realization of "<em>Supercomputer in your Desktop</em>" may not be too far from reality in the near future. Desktops today have multicore-processors with languages that support porting of functionalities from legacy serial application to parallel. These parallel languages are powerful yet simple and intelligible to a novice programmer. So, it wouldn't be condescending to the power that Parallel Computing brings, to say that parallel programming is becoming easier. The problem however rests in migration of complex logic inherent to legacy application while porting from serial to parallel. Thus, owing to ever simpler paradigms for parallel programming PC is not a rocket science after all sans the HPC problems.</p>
<p>The future looks to be an extremely adventurous ride given the present technology tendencies. We are in times of shaping new horizons and touching upon new frontiers. Let's not ostracize Parallel Computing thinking it to be a rocket science and esoteric; let's embrace it with open arms because there always rests a middle path for us to choose. </p>
<p>&nbsp;</p>]]>
        
    </content>
</entry>

<entry>
    <title>IDC Top 10 HPC Market Predictions for 2012</title>
    <link rel="alternate" type="text/html" href="http://www.infosysblogs.com/infosys-labs/2012/02/idc_top_10_hpc_market_predicti.html" />
    <id>tag:www.infosysblogs.com,2012:/infosys-labs//31.5801</id>

    <published>2012-02-24T07:21:43Z</published>
    <updated>2012-02-24T07:30:22Z</updated>

    <summary>International Data Corporation (IDC), the premier provider of market intelligence and advisory services has come up with the TOP 10 predictions for the HPC market for 2012. IDC&apos;s HPC team includes Earl Joseph, Steve Conway, Chirag DeKate, Lloyd Cohen, Beth Throckmorton, Charlie Hayes, and Mary Rolph. Their predictions offer insights into how the trends in HPC markets could drive the future changes and developments in this field.</summary>
    <author>
        <name>Pradeep Rao</name>
        
    </author>
    
        <category term="High Performance Computing" scheme="http://www.sixapart.com/ns/types#category" />
    
    <category term="bigdata" label="Big Data" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="gpu" label="GPU" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="hpc" label="HPC" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="idc" label="IDC" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="predictions" label="Predictions" scheme="http://www.sixapart.com/ns/types#tag" />
    
    <content type="html" xml:lang="en" xml:base="http://www.infosysblogs.com/infosys-labs/">
        <![CDATA[<p>International Data Corporation (IDC), the premier provider of market intelligence and advisory services has come up with the TOP 10 predictions for the HPC market for 2012. IDC's HPC team includes Earl Joseph, Steve Conway, Chirag DeKate, Lloyd Cohen, Beth Throckmorton, Charlie Hayes, and Mary Rolph. Their predictions offer insights into how the trends in HPC markets could drive the future changes and developments in this field.</p>
<p><br /><strong>1.</strong>&nbsp;<strong>The HPC Market Will Continue to Benefit from the Global Economic Recovery<br /></strong>2011 saw a HPC server revenue of about $10 billion. This is significant rebound to the pre-recession high point. The forecast from IDC for 2012 is that this will reach $10.6 billion and a projected revenue of $13.4 billion by 2015.</p>
<p><strong>2.&nbsp;The Worldwide High End Race Will Accelerate<br /></strong>The geographic breadth and diversity has increased in the HPC vendor market. India, China, France, Italy, Russia and US are all now into this space. North America still leads the HPC server share with 45% and US vendors occupy 94% on the high-end ($500k/system) revenue. With the largest supercomputers now costing $100-$400 million, there will be increasing pressure from political circles to justify the ROI. (Did we hear <a href="www.japantimes.co.jp/text/fl20120212x3.html">Japan</a>?)</p>
<p><strong>3.&nbsp;Exascale Decisions Could Shift Future Leadership<br /></strong>IDC predicts nations that under-invest in exascale software will lose ground in the HPC market. Improvements and advances in software and tools for effective usage of HPC platforms will be more important than the hardware progress. Hence we are seeing increasing number of vendors entering into the software HPC market thereby driving commoditization. Maintaining optimal balance among performance, power consumption and reliability will continue to be a challenge for architecting HPC solutions</p>
<p><strong>4.&nbsp;Software Leadership Will Become the New Battleground<br /></strong>Predominantly US has been leading in the HPC software sector. But others are sure catching up. European commission is making big investment plans for HPC software and hardware. Japan has plans of investing $35-$40 million for exascale software development.</p>
<p><strong>5.&nbsp;The Processor Arena Will Become More Crowded<br /></strong>x86 processors remains the dominant HPC processor market with about 82% share. IBM Power also is a prominent player with 11%. But it's the accelerators like GPUs and FPGAs that are gaining enormous ground. 28% of HPC sites worldwide are now enabled with GPU acceleration. Low powered processors such as ARM have found a liking by lot of hardware vendors (such as Nvidia) to build heterogeneous processors. Challenge ofcourse though is providing the programmers with the right tools and software to build applications targeting these new hardware platforms.</p>
<p><strong>6.&nbsp;National/Regional Technology Development Will Gain Momentum<br /></strong>The worldwide sentiment continues to remain that HPC technology is strategic and not preferable to be outsourced. Well, we know India built its own homegrown supercomputer back in 1980s because of the denial of access to HPC systems from abroad. Europe and Russia are all on the path to developing indigenous HPC technologies. A growing thought from all scientists and engineers is that a creditable HPC technology development can only happen if the environment is one of more choices for the users and avoiding protectionism.</p>
<p><strong>7.&nbsp;Big Data Methods Will Start to Transform the HPC Market, Including Storage<br /></strong>Existing commercial Big Data vendors are understanding the importance of HPC and the 2 fields are colliding. There is enormous interest generating for Big Data applications built on HPC technologies. Storage revenue will continue to grow 2-3% faster than servers. Data transfer technologies are of utmost importance for HPC applications for performance considerations. Faster interconnects and improved memory design for minimized data movement are on the feature list of most of the hardware vendors today.</p>
<p><strong>8.&nbsp;Cloud Computing Will Make Steady Progress<br /></strong>A fair bit of adoption is happening in the private cloud for HPC. But the same is not true for public cloud because of concerns on security, latency and pricing. But some of the suggested workloads where HPC public clouds can be adopted are those which do not have significant communication overheads. This includes pre-production R&amp;D projects and those by Small and Medium business enterprises who cannot afford for large data centers. Early adopters of HPC on cloud have been Government sectors, Manufacturing industries, Bio-Life sciences, Oil and Gas and Financial companies.</p>
<p><strong>9.&nbsp;There Will Be Shifting Sands in the Networking Market<br /></strong>Infiniband has had more momentum in the HPC interconnect market, but nevertheless Ethernet is poised to expand its share. The forecast for HPC interconnect market is $2 billion by 2014. As per IDC, for the proprietary interconnect market to grow, they will have to differentiate on top of the emerging and advanced standards to compete with Ethernet and Infiniband.</p>
<p><strong>10.&nbsp;Petascale Performance on Big Systems Will Create New Business Opportunities<br /></strong>The advances happening in the HPC server, processor, storage and networking market have opened up opportunities for a wide class of business applications to benefit from it. Application software will benefit from the higher performance that can be derived from heterogeneous systems and are also power aware. Big Data methods will see wider applications. On the system software side, smarter compilers and runtime systems are possible. Efficient power management is another critical design goal that can be achieved.</p>]]>
        
    </content>
</entry>

<entry>
    <title>Is Parallel Computing a Rocket Science or Esoteric? Part 2</title>
    <link rel="alternate" type="text/html" href="http://www.infosysblogs.com/infosys-labs/2012/02/is_parallel_computing_a_rocket.html" />
    <id>tag:www.infosysblogs.com,2012:/infosys-labs//31.5786</id>

    <published>2012-02-22T05:57:01Z</published>
    <updated>2012-02-22T06:29:49Z</updated>

    <summary>The preceding part spoke about the advent and history of the realm of Parallel Computing. This part will further speak on the evolution of Parallel Computing and attempt to answer &quot;Why Parallel Computing is so important all of a sudden today?&quot;</summary>
    <author>
        <name>Sridutt Bhalachandra</name>
        
    </author>
    
        <category term="High Performance Computing" scheme="http://www.sixapart.com/ns/types#category" />
    
    <category term="evolution" label="Evolution" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="gpgpu" label="GPGPU" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="gpu" label="GPU" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="gpucomputing" label="GPU Computing" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="hpc" label="HPC" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="parallelcomputing" label="Parallel Computing" scheme="http://www.sixapart.com/ns/types#tag" />
    
    <content type="html" xml:lang="en" xml:base="http://www.infosysblogs.com/infosys-labs/">
        <![CDATA[<p>The <a href="http://www.infosysblogs.com/infosys-labs/2012/02/is_parallel_computing_a_rocket_science_or_esoteric_part_1.html">preceding part </a>spoke about the advent and history of the realm of Parallel Computing. This part will further speak on the evolution of Parallel Computing and attempt to answer "Why Parallel Computing is so important all of a sudden today?"</p>
<p>In the last half century, Parallel Computing has evolved, if said, in a covert fashion without the renown that it has managed to amass in the last decade. We see so much of advancements in the Parallel Computing front today, which may seem overwhelming at times, but it is not that hard to discern as to why there has been an upsurge in this technology frontier. </p>
<p>So why so much of interest in Parallel Computing now, even when it existed 50 years ago? <em>As Prof. John Kubatowicz says "Parallelism is Everywhere" </em>- accounting for the fact that modern microprocessors have a billion transistor's rampant today even in handheld mobiles devices and clearly one must make them to work in parallel. Conversely, Parallel Computing is a trend today because it is forced upon us than our fancy. We have now hit the upper limit to making a single processor even faster in future than it is today given the present properties of the chip raw materials, say Silicon. Inadvertently, adding more than one processor to the chip die seems to be the only answer increasing the scope to program in parallel exponentially. Another reason for this astronomical boom is due to the advancement and evolution of computer hardware that has surfaced a new breed of processors into main stream computing than ancillary graphics processing, the <em>Graphics Processing Unit(GPU).</em></p>
<p>The <em>General-purpose computing </em>on graphics processing units (GPGPU) that involved hoodwinking the GPU to do computation in past, has now evolved into GPU Computing that inherently caters to complex computation owing to changes in the GPU hardware facilitating parallel programming. Today we see the giant microprocessor manufacturers in a tryst to make their chips massively parallel. New parallel programming languages are finding mass appeal every day. Also a GPU is no more considered a subordinate; this outlook has led to a new phase in multiprocessor technology influencing the&nbsp;creation of <em>Accelerated Processing Unit.</em></p>
<p><em>To be Continued...&nbsp;<br /></p></em>]]>
        
    </content>
</entry>

<entry>
    <title>What is your &quot;parallel&quot; style?</title>
    <link rel="alternate" type="text/html" href="http://www.infosysblogs.com/infosys-labs/2012/02/what_is_your_parallel_style.html" />
    <id>tag:www.infosysblogs.com,2012:/infosys-labs//31.5778</id>

    <published>2012-02-20T08:12:38Z</published>
    <updated>2012-02-22T06:23:45Z</updated>

    <summary>This blog talks about different application styles in HPC and what choice of programming support is available today.</summary>
    <author>
        <name>Sripriya Thothadri</name>
        
    </author>
    
        <category term="High Performance Computing" scheme="http://www.sixapart.com/ns/types#category" />
    
    <category term="hpc" label="HPC" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="hpctools" label="HPC tools" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="parallelcomputing" label="Parallel Computing" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="parallelprogramming" label="Parallel programming" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="parallelprogrammingaids" label="Parallel programming aids" scheme="http://www.sixapart.com/ns/types#tag" />
    
    <content type="html" xml:lang="en" xml:base="http://www.infosysblogs.com/infosys-labs/">
        <![CDATA[<p>Well, starting from where I left <a href="http://www.infosysblogs.com/infosys-labs/2012/02/hello_parallel_computing.html">last</a>, parallel computing is a complex business but then the computing industry is working to simplify this daunting task. There is a rich variety of solutions already in the shelves today - near-Auto Parallelizers, Accelerators, a wide collection of libraries and other high level abstractions. There are also the traditional low level support and programming languages that offer rich customizations and optimizations. This <a href="http://www.infosysblogs.com/infosys-labs/2012/02/hpc_tools_classification.html">post </a>gives a neat classification of various tools and programming&nbsp;abstractions in GPU Computing. </p>
<p>So it's really the need, as is the case for any decision, that drives the style of the parallel code. You could do it all yourself by custom coding or&nbsp;achieve parallelism by using some automatic means. You could be building a completely fresh parallel program or perhaps converting an existing serial program to a parallel one. The diagram below sort of puts some structure to help you decide your program style:</p>
<p><a onclick="window.open('http://www.infosysblogs.com/infosys-labs/assets_c/2012/02/Pictureblog2-598.html','popup','width=1512,height=3784,scrollbars=no,resizable=no,toolbar=no,directories=no,location=no,menubar=no,status=no,left=0,top=0'); return false" href="http://www.infosysblogs.com/infosys-labs/assets_c/2012/02/Pictureblog2-598.html">View image</a></p>
<p>I have only listed the most popular methods available today that caters to 2 different objectives. It is quite possible that the need is to achieve high performance by fine tuning the code to work very well on a particular parallel hardware. This will require intimate knowledge of the target hardware. This, as shown in the digram, is the Custom Parallelization path that, if done correctly, can yield high performance. This path will be opted by a mature, parallel computing programmer. Such a style will be most suitable for core scientific applications and frameworks or libraries, where it will essential to achieve the highest performance possible on a given hardware. On the other hand, it is possible that&nbsp;the intent is to achieve parallelization rapidly and&nbsp;a reasonable application performance is acceptable. This, as&nbsp;shown in the diagram, is Rapid Parallelization that yields accelerated parallelization with&nbsp;perhaps reasonable performance. The performance&nbsp;optimization is left to the software aid&nbsp;or accelerator used. I have categorized the&nbsp;available software accelerators, programming languages, libraries and other utilities that&nbsp;can help achieve, both, custom&nbsp;parallelization and rapid&nbsp;parallelization&nbsp;objectives.&nbsp;</p>
<p>HPC is a fertile ground for research and I am sure that there are going to be rapid advancements in the next few years. Every vendor is aiming to make parallel programming simpler and this will spur HPC adoption greatly, especially in the enterprise world.&nbsp;At Infosys&nbsp;research too, we are building&nbsp;tools&nbsp;that will smoothen the steep learning curve of parallel computing and accelerate&nbsp;conversion of sequential applications to their parallel couterparts. We are also working on the software engineering aspects of building new HPC applications. </p>
<p>Hmm, I have already said too much. Just like the TV Sitcoms, that leave the audience each day with enough anticipation to watch the next episode, I will end this with this whiff&nbsp;of our work. In the meantime, you could think about what is your parallel programming style.</p>]]>
        
    </content>
</entry>

<entry>
    <title>HPC tools classification</title>
    <link rel="alternate" type="text/html" href="http://www.infosysblogs.com/infosys-labs/2012/02/hpc_tools_classification.html" />
    <id>tag:www.infosysblogs.com,2012:/infosys-labs//31.5770</id>

    <published>2012-02-17T05:28:50Z</published>
    <updated>2012-02-17T05:48:46Z</updated>

    <summary>Gone are the days when there were only few parallel programming frameworks available like OpenMP, MPI and Threading Building Blocks. Now, with the advent of GPU computing and manycore architectures, there are a lot of High Performance Computing (HPC) languages...</summary>
    <author>
        <name>Balkrishna Prasad</name>
        
    </author>
    
        <category term="High Performance Computing" scheme="http://www.sixapart.com/ns/types#category" />
    
    <category term="hpctools" label="HPC tools" scheme="http://www.sixapart.com/ns/types#tag" />
    
    <content type="html" xml:lang="en" xml:base="http://www.infosysblogs.com/infosys-labs/">
        <![CDATA[<p class="MsoNormal"></p><p><font face="verdana, sans-serif" size="3"></font></p><p></p><p>Gone are the days when there were only few parallel programming frameworks available like OpenMP, MPI and Threading Building Blocks. Now, with the advent of GPU computing and manycore architectures, there are a lot of High Performance Computing (HPC) languages and tools available which helps in speeding up our applications.</p><p>The HPC tools can be classified into 4 categories:</p><p>1. HPC Migration Language / HPC Language Extensions:</p><p>These HPC tools are basically extensions of existing languages such as C/C++. NVIDIA CUDA (Compute Unified Device Architecture) is one of them. For migration of an application using CUDA, the source code needs to be re-engineered; algorithm needs to be modified such that a large no. of GPU threads can be utilized to achieve the desired speed-up. OpenCL (Open Computing Language) is another such language extension. It is more low-level language than CUDA. The latest addition to this category is Microsoft C++ AMP.</p><p>2. Parallel Coding Assistant:</p><p>The tools in this category help us while coding in IDE like Microsoft Visual Studio. Intel Parallel Studio 2011 and Intel Parallel Studio XE 2011 can be integrated with Microsoft Visual Studio. They have been provided features which can help a programmer to analyze the code to find hotspots for adding parallelism, compose the source code by adding Intel Threading Building Blocks or Intel Cilk Plus constructs to exploit parallelism. They also have features to find memory errors or threading errors. The modified source code can be executed on any multi-core CPUs or Intel's Many Integrated Core (MIC) architectures.</p><p>3. Directives based Accelerator Models:</p><p>These are programming models which help a programmer to exploit parallelism by adding directives to potentially parallel portions of a sequential source code. The directives can be C pragma directives. PGI Accelerator Compiler from Portland Group Inc.(PGI) is based on such programming model. It also provides compiler feedback for the portions which could not be parallelized owing to dependency involved. For the computations to be performed on GPUs for getting desired speed up, the data needs to be copied to GPU device memory and then the result obtained has to be copied back to the CPU. This data transfer activity is taken care of by the PGI Accelerator compiler. The portion of the source code marked with parallel region gets executed directly on GPU device, thus accelerating the application. &nbsp;HMPP from CAPS Enterprise is similar Accelerator model. OpenACC is an upcoming accelerator model which is being supported by Cray, CAPS Enterprise, NVIDIA and PGI.</p><p>4. Library assisting in HPC migration:</p><p>There are a lot of library available which makes GPU programming easier. Lot of common algorithms like reduction, scan, etc. which are required in case of GPU programming are available which are optimized for execution on GPU devices. CUBLAS, CUFFT and CURAND are such libraries which can be used on CUDA platform. Thrust is a library of parallel algorithms with an interface resembling the C++ Standard Template Library (STL) that greatly enhances developer productivity. Libra SDK is a C++ programming API for creating high-performance applications. ArrayFire is a GPU software acceleration library.</p><p>The HPC tools mentioned above is not an exhaustive list. Through this blog, I have tried to classify the HPC tools and very briefly wrote about the tools. More details on HPC tools in my coming blogs.</p><p></p><p></p><p></p> ]]>
        
    </content>
</entry>

<entry>
    <title>Is Parallel Computing a Rocket Science or Esoteric? Part 1</title>
    <link rel="alternate" type="text/html" href="http://www.infosysblogs.com/infosys-labs/2012/02/is_parallel_computing_a_rocket_science_or_esoteric_part_1.html" />
    <id>tag:www.infosysblogs.com,2012:/infosys-labs//31.5769</id>

    <published>2012-02-17T03:47:54Z</published>
    <updated>2012-02-17T04:18:52Z</updated>

    <summary>A humble attempt to bring to you my understanding of this so called &quot;Dark Science&quot; considered by many only a esoteric craft. I bring to you a 3 part series describing &quot;The past, present and future of Parallel Computing through the eyes and experiences of a commoner&quot;

</summary>
    <author>
        <name>Sridutt Bhalachandra</name>
        
    </author>
    
        <category term="Distributed Computing" scheme="http://www.sixapart.com/ns/types#category" />
    
        <category term="High Performance Computing" scheme="http://www.sixapart.com/ns/types#category" />
    
    <category term="architecture" label="Architecture" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="history" label="History" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="hpc" label="HPC" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="parallelcomputing" label="Parallel Computing" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="parallelism" label="Parallelism" scheme="http://www.sixapart.com/ns/types#tag" />
    
    <content type="html" xml:lang="en" xml:base="http://www.infosysblogs.com/infosys-labs/">
        <![CDATA[<p>My association with the field of High Performance Computing has been intriguing and a journey&nbsp;of&nbsp;revelations where in I have tried to understand&nbsp;the intricacies of a subject that has been long under the hoods.&nbsp;It just seems so recent that&nbsp;it has been rewarded with its much awaited 'Glory'.</p>
<p>I make here&nbsp;a humble attempt to bring to you my understanding of this so called "Dark Science" considered by many only a esoteric craft. I bring to you&nbsp;a 3 part series describing&nbsp;<em>"The past, present and future of Parallel Computing through the eyes and experiences of a commoner"</em></p>
<p>You pour yourself a cup of hot brewing coffee and descend in a chair sipping on it, while reading your early morning dose of news. A common daily routine for each one of us, so what's so special? We seldom happen to appreciate that the trifling that surrounds us influences our broader picture of life immensely. The coffee with the newspaper was a classic example of multi-tasking or doing things in parallel. And this is exactly what we do in <em>Parallel Computing aka Processing (PC</em>); go about doing or trying to do computing simultaneously.<br /></p>
<p>From ancient ruins dating say a 100BC which gave us some tablets and abacuses capable of doing computation in parallel to the many-core architecture cutting edge parallel computer architectures today, the journey has been intriguing and of a realization. Each milestone reached in this journey involved imbibing something from simple real life to make it a breakthrough in the technology world. For example, <em>Prof. Dave Patterson's Laundry Example; outlining the principles of pipelining in parallel computer architecture.</em> Goes to say is we all know <em>Parallel Processing aka Computing</em>, it's just that we never realized we did.<br /></p>
<p>Though, the <em>IBM 704 with its Principal Architect Gene Amdahl</em> has been regarded as the first commercial breakthrough at creating a machine with floating-point hardware in 1955; Wikipedia tracks back the true origins of <em>Parallel Computing (aka MIMD parallelism)</em> to <em>Federico Luigi, Conte Menabrea </em>and his <em>"Sketch of the Analytic Engine Invented by Charles Babbage"</em> in 1842. This work by Luigi can be regarded as the first treatise describing many aspects of computer architecture and programming.</p>
<p><em>To be continued...</em></p>
<p><em></em>&nbsp;</p>]]>
        
    </content>
</entry>

<entry>
    <title>Hello Parallel Computing!</title>
    <link rel="alternate" type="text/html" href="http://www.infosysblogs.com/infosys-labs/2012/02/hello_parallel_computing.html" />
    <id>tag:www.infosysblogs.com,2012:/infosys-labs//31.5763</id>

    <published>2012-02-15T11:40:00Z</published>
    <updated>2012-02-15T06:07:44Z</updated>

    <summary>What makes Parallel Computing hard?</summary>
    <author>
        <name>Sripriya Thothadri</name>
        
    </author>
    
        <category term="High Performance Computing" scheme="http://www.sixapart.com/ns/types#category" />
    
    <category term="dataparallel" label="Data Parallel" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="hpc" label="HPC" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="parallelcomputing" label="Parallel Computing" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="paralleldesign" label="Parallel design" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="parallelprogramming" label="Parallel programming" scheme="http://www.sixapart.com/ns/types#tag" />
    <category term="taskparallel" label="Task Parallel" scheme="http://www.sixapart.com/ns/types#tag" />
    
    <content type="html" xml:lang="en" xml:base="http://www.infosysblogs.com/infosys-labs/">
        <![CDATA[Computing applications are popularly serial in nature, meaning the program is designed to run on a single computer. Since they are run on a single machine, at any given instance there is just one programming instruction that is executed. Thus, clearly the instructions in a serial program are executed one at a time and one after the other, in the sequence in which they appear in the program. Given today's parallel infrastructure, it is a shame to run such serial programs on this powerful hardware. Clearly the hardware is quite underutilized. And this is exactly what parallel computing solves. To simply define, parallel computing allows more than one instruction to be <em>concurrently executed </em>and hence is able to use the dedicated computing resources effectively. So, for example, if a parallel program is run on a quad-core processor, it is possible to execute 4 simultaneous instructions at any given instance in time. A serial program, on the other hand, will only be able to utilize one of the 4 cores at any instant.<br />Now that I have (hopefully) your attention, let me pop a question. So is parallel computing as complex as it sounds to be? And, unfortunately, the answer is yes. It is a hard job to design and develop an error-free parallel program. Hard because thinking in parallel and designing parallel programs is not something most are trained for and also because this process takes a good amount of time. <br />In the world of <font style="FONT-SIZE: 1em">HPC</font>, parallel computing is a must in order to use computing resources like multi-core <font style="FONT-SIZE: 1.25em"><font style="FONT-SIZE: 0.8em">CPU</font>s</font>, <font style="FONT-SIZE: 1.25em"><font style="FONT-SIZE: 0.8em">GPU</font>s</font> and other accelerators. And, the program design varies from one computing resource to another.&nbsp; It is because the computing resources can be classified to work best for a particular class of parallelism. On a high level, parallelism can be classified as Task Parallel and Data Parallel. To be able to design a well optimized parallel program, it will be essential to identify whether the problem is task or data parallel or is a mix of both. The next step will be to identify the appropriate computing resource. A data parallel program is well suited for a GPU. On the other hand, the CPU is best for task parallel programs. With the decision on the hardware made, comes the next step of actually designing the parallel program, developing this using the appropriate programming model and running this to check for correctness. This is a mammoth step and an important achievement. And then it comes to the star step, to quench the thirst for speed, it is essential to fine tune or optimize the program to achieve the much sought after speed up. <br />Things get really exciting in my side of the world, the HPC world. Keep watch to read about ways to solve the mysteries of parallel computing.<br />]]>
        
    </content>
</entry>

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